2-bit magnitude comparator
Gate-level comparator for two 2-bit numbers with GT, EQ and LT outputs — XOR, NOT, AND, OR and NOR gates in ANSI distinctive-shape symbols with real fan-out.
For the digital logic instructor
Scenario
The circuit every digital-logic course draws at least once: compare A = A1A0 with B = B1B0 and raise exactly one of three outputs — A greater than B (GT), equal (EQ), or less than (LT). Ten gates cover most of the ANSI symbol set, and several signals feed two gates each.
Annotation key
input/output— the external pins on the left and right edgesname = GATE(a, b)— one gate; the name becomes the label of its output wire- Intermediate names (
nB1,d1,e1,g1,g0) — internal nets that other gates reuse AND(e1, A0, nB0)— a 3-input gate; any number of inputs is allowedNOT,XOR,AND,OR,NOR— each gate type has its own outline, so no type text is printed#lines — comments; they are not drawn
How to read
Signals flow left to right. The two XORs flag which bit positions differ; EQ is the NOR of those flags, so it is true only when both bits match. GT is true when the high bit decides (A1 is 1 and B1 is 0) or when the high bits match and the low bit decides (A0 is 1 and B0 is 0). LT is whatever is left: the NOR of GT and EQ. A filled dot marks a wire that splits to feed several gates; wires that only cross have no dot.