Standards · methods · benchmarks

Professional diagrams, made inspectable.

Worked technical notes where every conclusion can be traced to a source, checked against the diagram structure, and reproduced from text.

reproducible-note.stxVALIDATED
faulttree "Both pumps fail"
  analysis: cutsets, probability
  top T = AND(PA, PB)
  basic PA "Pump A fails" p: 0.01
  basic PB "Pump B fails" p: 0.01
Redundant-pump fault tree rendered by Schematex
1 minimal cut setP(T) = 1.00e-4
Published notes
31
Practice areas
22
Cited references
130
Method
Source → structure → SVG

RESEARCH LIBRARY / 2026

Worked notes

Standards are named by edition. Calculations show their assumptions. Safety and clinical boundaries stay visible.

RENDERED OUTPUTSVG
Fault tree in which both redundant pumps must fail for the top event to occur
Computed and rendered by Schematex using NUREG-0492-style symbols.
1×10⁻⁴top-event probability when two independent 0.01 events must both occur

Fault-tree minimal cut sets: a worked redundant-pump example

Two 1% pump-failure events, one AND gate, one order-two minimal cut set—and the assumptions required before the familiar 0.0001 result means anything.

Schematex Reliability LabAug 12, 2026
RENDERED OUTPUTSVG
Event tree for a primary cooling-water supply loss branching through automatic transfer, standby train start, and required flow, with four computed sequence frequencies
Rendered deterministically by Schematex 1.0.9 from the source reproduced here; all path frequencies, the 0.01264 per year outcome roll-up, and the conservation check were independently recalculated.

Event tree probability calculation: paths, roll-up, and checks

Work one initiating frequency through three success/failure branches, reconcile four sequence frequencies to 0.04 per year, and roll the adverse outcome up to 0.01264 per year.

Ray WhitfieldAug 15, 2026
RENDERED OUTPUTSVG
PERT network for instrument commissioning with seven activity boxes, a red A-C-D-F-G critical path, a 19.17-day expected duration, and float on two noncritical tasks
Rendered deterministically by Schematex 1.0.9 from the source reproduced here; the two footer summaries were stacked for mobile legibility, and every computed value was independently recalculated.

PERT critical path: expected time, float, and a worked network

Turn seven three-point activity estimates into a 19.17-day schedule, prove the A-C-D-F-G critical path, and separate deterministic PERT arithmetic from schedule risk analysis.

Rowan BeckAug 16, 2026
RENDERED OUTPUTSVG
Negative-feedback control block diagram with reference entering a plus input, measured output entering a minus input, proportional controller C of s equals 4, first-order plant G of s equals 1 over 2s plus 1, and unity sensor H of s equals 1
Rendered deterministically by Schematex 1.0.12 from the validated source reproduced here; algebra and unit-step values were independently recomputed from the stated continuous-time model.

Closed-loop transfer function: a negative-feedback worked example

Reduce a proportional controller, first-order plant, and unity sensor to one transfer function; then verify the pole, time constant, unit-step values, steady-state error, and feedback sign.

Mara VossAug 21, 2026
RENDERED OUTPUTSVG
Markov chain with Healthy and Degraded transient pump states leading to a double-ring Failed absorbing state; transition probabilities are 0.80, 0.15, 0.05, 0.60, 0.40, and 1.00
Rendered deterministically by Schematex 1.0.13 from the source reproduced here; the transition matrix, two-step distribution, fundamental matrix, absorption probabilities, and expected steps were independently recalculated.

Absorbing Markov chain: expected time to equipment failure

Build and check a three-state inspection model, then calculate the two-month distribution, fundamental matrix, absorption probability, and expected time to failure.

Maya ChenAug 24, 2026
RENDERED OUTPUTSVG
Loaded voltage-divider schematic with a 10 V source, 10 kiloohm upper resistor, and parallel 10 kiloohm lower and load resistors connected at the Vout node
Rendered deterministically by Schematex 1.0.13 from the positional circuit source reproduced here; strict rendering returned no diagnostics, and the divider, KCL, and Thévenin calculations were independently recomputed.

Loaded voltage divider: output voltage and measurement error

Calculate a 10 kΩ / 10 kΩ divider before and after a 10 kΩ load, then verify the 3.333 V result with KCL, a Thévenin equivalent, and a meter-loading check.

Lena OrtizAug 26, 2026
RENDERED OUTPUTSVG
Petri net after Start fires, with one token in Raw, one in InProcess, no token in MachineFree, and Complete highlighted as enabled
Rendered deterministically by Schematex 1.0.13 from the source reproduced here; strict rendering returned no diagnostics, and every marking was independently recomputed from the firing rule and incidence matrix.

Petri net firing sequence: markings, matrix equation, and two conservation checks

Follow two parts through one machine, compute every reachable marking, and use the incidence matrix plus two P-invariants to catch an illegal firing sequence.

Mara VossAug 28, 2026
RENDERED OUTPUTSVG
SPI Mode 0 timing diagram with active-low chip select, eight low-idle clock pulses, MOSI bits 10100110, and rising-edge capture labels D7 through D0
Rendered deterministically by Schematex 1.0.13 from the source reproduced here; strict parsing and rendering returned no diagnostics, and the frequency, period, duration, hexadecimal, and bit-order checks were independently calculated.

SPI modes 0–3: CPOL, CPHA, and a 2 MHz timing check

CPOL chooses the idle clock level; CPHA chooses whether data is captured on the leading or trailing edge. Map all four modes, then trace 0xA6 through an eight-clock Mode 0 transfer.

Lena OrtizAug 31, 2026
RENDERED OUTPUTSVG
Function Block Diagram with SUB, DIV, and MUL blocks scaling a 4 to 20 milliamp input to 0 to 250 kilopascals, followed by separate display limiting and range checks
Rendered deterministically by Schematex 1.0.13 from the source reproduced here; strict parsing and rendering succeeded, and the endpoint, midpoint, worked-value, inverse, and out-of-range calculations were independently checked.

4–20 mA PLC scaling: a 0–250 kPa worked FBD example

Scale 4–20 mA to engineering units with the endpoint formula, verify 13.6 mA = 150 kPa, and keep range diagnostics separate from a limited display value.

Ray WhitfieldSep 1, 2026
RENDERED OUTPUTSVG
Single-line diagram from an assumed infinite 480 volt source through a 75 kilovolt-ampere transformer with 5 percent impedance to a 208 volt secondary calculation point and downstream breaker
Rendered deterministically by Schematex 1.0.13 from the source reproduced here; strict parsing and rendering succeeded, and the full-load current, fault-current, fault-power, and impedance-sensitivity calculations were independently checked.

Transformer fault current from %Z: a 75 kVA worked example

A 75 kVA, 208 V three-phase transformer with 5% impedance has about 4.16 kA of symmetrical RMS fault current at its secondary terminals under an infinite-source assumption.

Nina PatelSep 2, 2026
RENDERED OUTPUTSVG
IDEF0 diagram with three functions for validating a requisition, selecting a supplier, and issuing a purchase order, with inputs on the left, controls above, mechanisms below, and the final output on the right
Rendered deterministically by Schematex 1.0.13 from the source reproduced here; strict parsing returned no diagnostics, and every ICOM role was independently checked against the stated function.

IDEF0 input vs control vs mechanism: a purchase-order worked example

Classify an IDEF0 arrow by what it does at one function: a requisition is transformed input, policy is control, the buyer and ERP are mechanisms, and the issued purchase order is output.

Mara VossSep 4, 2026
RENDERED OUTPUTSVG
UML sequence diagram showing synchronous calls and dashed replies for an export job request, followed by an asynchronous event from an event bus to a worker
Rendered deterministically by Schematex 1.0.14 from the source reproduced here; strict parsing and rendering succeeded, and all 15 messages were checked against the declared UML message sorts.

UML synchronous vs asynchronous messages: a 202 Accepted worked sequence

Use a filled solid arrow for a synchronous call, an open solid arrow for an asynchronous message, and a dashed arrow for the reply—even when that reply is HTTP 202 Accepted.

Maya ChenSep 6, 2026

EDITORIAL METHOD / v1.0

What makes a note citable?

  1. 01Answer first

    The direct answer appears before background or product context.

  2. 02Name the boundary

    Edition, model assumptions, and professional-use limits are explicit.

  3. 03Expose the structure

    The diagram is rendered from readable source instead of flattened artwork.

  4. 04Link the evidence

    Primary standards and methods sit beside the claim they support.